1. Field of the Invention
The present invention relates to static memories, and more particularly to a non-volatile static random access memory (SRAM) device configured by adding a metal oxide semiconductor (MOS) transistor having a floating gate to the memory cell region of an SRAM, thereby allowing the SRAM to exhibit non-volatile memory characteristics.
2. Description of the Prior Art
Recently, technical fields, with which computers are associated, have been developed to provide compact, high performance and high speed computers by virtue of developments in semiconductor technology. In particular, memories used in computers have been developed to provide an integration of an increased number of memory cells per unit area in order to achieve a compactness thereof.
Memories are mainly classified into those of a read only memory (ROM) type and those of a RAM type. ROM's are storage devices having characteristics of preventing data once recorded from being erased. Such ROM's are used to store permanently specific programs such as programs of operating systems. On the other hand, RAM's are storage devices having characteristics of allowing data to be stored and to be changed therefrom. Such RAM's are mainly used to temporarily store data generated during operations of operating systems. In order to achieve a high-speed system operation, it is required to use a RAM having a high access (read/write) speed. To this end, RAM's have a configuration including a set of memory cells each having a configuration illustrated in FIG. 1 or 2.
In the case of a SRAM shown in FIG. 1, the time taken to access data is short, thereby enabling a high-speed data processing, even though a degradation in density is involved because the unit cell of this SRAM consists of many elements.
On the other hand, in the case of a dynamic RAM (DRAM) shown in FIG. 2, there is an advantage in that a high density is obtained, as compared to the SRAM of FIG. 1. However, this DRAM needs to periodically refresh data, already stored, data given interval of time. This results in a large consumption of electric power.
Both the DRAM and SRAM have volatile characteristics, namely, a drawback, in that data stored disappears when the supply of drive voltage VDD is cut off. For this reason, non-volatile memories, such as electrically erasable and programmable ROM's (EEPROM's) and flash memories, having the characteristics of both the ROM and RAM are used in electronic appliances and elements for specific applications. However, such non-volatile memories are limitedly used because they have a drawback in that a lengthened time is taken to erase data stored or to write new data, even though data stored is kept in spite of a cut-off of electric power.
To this end, system designers should take into consideration characteristics of memories used in those systems. In the case of computer systems, however, an occasion that data disappears during its processing occurs frequently due to power failure or other reasons. In order to solve this problem, incorporation of an uninterrupted power supply in computer systems has been proposed. However, this results in an increase in the costs.
A number of schemes have been proposed to take the advantages of both the volatile and non-volatile memories, thereby eliminating the above mentioned problems. One scheme is to add a non-volatile memory to a static memory device, thereby allowing the static memory device to have non-volatile characteristics (Reference: Non-volatile Semiconductor Memory with SCRAM Hold Cycle Prior to SCRAM-to-EEPROM Backup Transfer, U.S. Pat. No. 4,965,828)
As apparent from the patent, however, such a memory device has problems such as a low data transfer rate and a low integration degree because the memory device is a simple combination of a static memory device with a non-volatile memory element.
Another scheme is to add a non-volatile memory element and a switch element to a static memory device, thereby allowing the static memory device to have non-volatile characteristics (Reference: IEEE J. Solid State Circuits, Vol. 18, No. 5, D. J. Lee, N. J. Becker and et al., pp. 525-531, Oct. 1983). However, this memory device is also problematic in that its density is low due to a large memory area additionally required. Furthermore, the memory device has a structure having a poor symmetry, thereby resulting in a degradation in the data keeping ability thereof.
Another scheme is to add a planar non-volatile memory element to a static memory device having a conventional configuration, along with switch elements adapted to switch the planar non-volatile memory element, thereby allowing the static memory device to have non-volatile characteristics (Reference: IEEE J. Solid State Circuits, Vol. 32, No. 6, P. J. Wright and R. U. Madurawe, pp. 918-919, June 1997). However, this memory device is also problematic in that its density is low due to a large memory area additionally required. Furthermore, the memory device exhibits a poor symmetry. Since the additional elements may operate during an operation of the static memory device, they may affect adversely the performance of the entire device.